Osamu Yaegashi

Angestellt, Sr. Field Apprication Engineer, Atretna Inc.

Yokohama, Japan

Fähigkeiten und Kenntnisse

Fomal Verificatin
property
assertion
Clock Domain Crossing
CDC

Werdegang

Berufserfahrung von Osamu Yaegashi

  • Bis heute 17 Jahre und 8 Monate, seit Nov. 2006

    Sr. Field Apprication Engineer

    Atretna Inc.

    I'm supporing Clock Domain Crossing product and SDC product. And I have exerience of Formal Verification area. I'm consulting to use formal technich to fix some problem on each design problem.

  • 8 Jahre, Nov. 1998 - Okt. 2006

    Field Appricatin Engineer

    SC Hightech Corp.

    I supported Ambit, Crysalis, Sente, Jabrin Tera systems and Averant. I have good experience formal verificaton technology and implement tool.

  • 5 Jahre und 7 Monate, Apr. 1993 - Okt. 1998

    Multimedia labratory, System LSI Design Division

    Toshiba

Ausbildung von Osamu Yaegashi

  • 4 Jahre, Apr. 1989 - März 1993

    Computer Information Technology

    Toyohashi Univercity of Technology

    I joined VLSI design lablatory and designed JPEG chip on 1993 with VHDL language. Especially, I throught suitable architectuer for JPEB on each product.

Sprachen

  • Japanisch

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